Two-dimensional analytical modeling for electrical characteristics of Ge/Si SOI-tunnel FinFETs

Abstract

This paper reports a two-dimensional (2-D) analytical model for surface potential, electric field, drain current and threshold voltage of a three-dimensional (3-D) Ge/Si heterojunction SOI-Tunnel FinFET (TFinFET) with a SiO2/HfO2 stacked gate oxide structure. The top gate-oxide has been considered thicker than the side gate-oxides to approximate its operation to that of the double-gate (DG) devices. The gate-oxide is assumed to be overlapped on the source region of the device. The 2-D surface potential model of the device is obtained by 2-D Poisson's equation using the superposition technique. The surface potential model has been used for modeling the electric field and drain current of the device. Taylor's series expansion has been adopted to develop the threshold voltage model of the device. The effect of mobile charge also included in the Poisson's equation for improving the accuracy of the proposed model. The model results have been validated by comparing the Synopsys 3-D TCAD simulation data for different parameters such as the gate length, drain voltage, and gate-oxide thickness of the proposed TFinFET device.