Abstract
Abstract We developed ultra-low resistive tungsten dual polymetal (W/barrier metal/dual poly-Si) gate technology suitable for a high performance and high density dynamic random access memory (DRAM) device by using a Ti-based diffusion barrier and a unique tungsten chemical vapor deposition (CVD) process with a B2H6-based nucleation layer. The new low resistive CVD-W deposited on Ti/WN diffusion barrier of dual polymetal gate process not only reveals good oxide reliability comparable to the physical vapor deposition, PVD-W process, but also highly improved transistor performance with signal delay characteristics.
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