Transparent testing for intra-word memory faults

Abstract

Transparent BIST schemes for RAM modules assure the preservation of the memory contents during periodic testing. Symmetric Transparent Built-in Self Test (BIST) schemes skip the signature prediction phase required in traditional transparent BIST, achieving considerable reduction in test time. In this work we propose a Symmetric transparent BIST scheme that can be utilized to serially apply march tests bit-by-bit to word-organized RAM's, in a transparent manner, in the sense that the initial contents of the RAM are preserved. To the best of our knowledge, this is the first scheme proposed in the open literature to target intraword faults in the concept of transparent BIST for RAMs.