Trace-in-bump for flip chip applications

Abstract

Substrate pad pitch and line / space have always been an obstacle for flip chip technologies advancement. As such, the cost of redistribution layer and infrastructure always hinder the growth for flip chip interconnect adoption for various packaging applications. In addition, the thermocompression non conductive paste (TCNCP) bonding always encounter low throughput due to the crosslinking of polymers and precise placement accuracy on flip chip bonder. Fluxless solid liquid inter-diffusion by compressive force (SLICF) with unique flip chip interconnect architecture named as Trace-in-bump (TIB) with non conductive paste (NCP) is introduced to overcome the challenges of fine pitch flip chip bonding and throughput. As substrates and PCBs are always face with patterning design constraints to meet the die pad pitch, the TIB-NCP architecture adopted a subtractive taper as the receiving pad for flip chip applications. This enables a fine line space at low cost to meet and remove the need of redistribution for some devices. The taper receiving trace also provides a mechanical mean to break the molten solder bump on the die and enables an instantaneous solid liquid interdiffusion to form the joints as per SLICF bonding. This removes the need of paste printing and reflow process for flip chip assembly. In addition, the removal of flux also enables fine pitch flip chip applications. The TIB-NCP is applied with non conductive paste (NCP) to improve the assembly throughput. Differential Scanning Calorimetry (DSC) was used to characterize the NCP materials to optimize the TIB-NCP bonding and to reduce bonding time from 16s to 8s. The TIB-NCP improves the throughput and enables a fluxless flip chip bonding for fine pitch applications.