Cu/SnAg Double Bump Flip Chip Assembly as an Alternative of Solder Flip Chip on Organic Substrates for Fine Pitch Applications

Abstract

Recently, the need of fine pitch flip chip interconnection has been continuously growing. In spite of this trend, solder flip chip interconnections have reached the limit in fine pitch applications of less than about 150 mum pitch, because bump bridging between adjacent solder bumps occur. Therefore, the investigation on the fine pitch flip chip structure and its reliability are being needed. Metal column and solder double layered (^double bump) flip chip structure is one of the candidates for fine pitch applications. Double bump flip chip structure provides three advantages: (1) fine pitch flip chip interconnection less than 150 mum due to straight shape of metal column bumps, (2) better thermo-mechanical reliability by changing the height of metal column bumps, and (3) high current-carrying capability due to excellent electrical conductivity of Cu as one of the column bump materials. In this study, Cu (60 mum) / SnAg (20 mum) double bump flip chip were investigated as one of the promising fine pitch interconnections. We successfully demonstrated Cu/SnAg double bump flip chip assembly with 100 mum pitch on organic PCB substrates without bridged bumps by optimizing the bonding conditions such as bonding temperature profile, bonding force and flux. Assembled Cu/SnAg double bump joints had stable contact resistance of 12~14 mOmega. And then, we studied interfacial reactions and reliability evaluation of Cu/SnAg double bump flip chip assembly. Cu3Sn, Cu6Sn5, Ni3Sn4, (Cu,Ni)6Sn5, and Ag3Sn IMCs were formed at Cu/SnAg double bump joints after the additional reflow and solid-state aging. Excessive IMC growth and the formation of Kirkendall voids can be one of the origins which can deteriorate mechanical and electrical reliability of flip chip joints. All Cu/SnAg double bumps showed stable contact resistance after 1000 hours 85degC/85%RH test. And, Cu/SnAg double bumps generally maintained their initial contact resistance after high temperature storage test but showed slightly increased resistance at 150degC due to the formation of Kirkendall voids. On the other hand, contact resistance increased after thermal cycling test. After 1002 cycle T/C test, the failure at Si chip and bump interface was observed in corner and edge bumps. However, center bumps still maintained their contact even after 1000 T/C cycles. The main cause of thermal cycling failures was the Al and Ti UBM depletion between Si chip and Cu column bumps