Toward Thinner and Higher Heat Dissipation Advanced Chip Embedded Power Supply Module Packaging

Abstract

Along with power management complexity, small/thin and high efficiency power supply devices such as DCDC converters and Inverters needs are increasing. In response, several chip-embedded packages have been proposed, but their size/thickness, heat dissipation properties, and cost necessitate the development of further concepts. In this report, we propose novel chip-embedded package that uses Semi-additive metallization with non-prepreg coreless substrate and 300 mm square Panel-level manufacturing for cost competitiveness. In the case of a prepreg substrate, it is difficult to make large thermal vias due to presence of glass cloth and the presence of the substrate core makes thickness reduction difficult. Because of such difficulties, prepreg substrate packages have limited characteristics around thermal performance and thickness. Our proposed structure has excellent heat dissipation and minimized thickness due to using thin non-prepreg coreless substrates that allows for large thermal vias by a laser drill and the thin package. We performed thermal resistance simulations and found that our package improved up to 43% as compared to the prepreg package. And also, our build-up interlayer material has close CTE to Cu-RDL and a low Young’s modulus that is effective in reducing package warpage. As a result of simulation, package warpage after post-curing is just 1/10th of that of the prepreg package, this means highly reliable on board. Developments using Si power die will be reviewed. We believe our proposed new package is also suitable for high performance package utilizing GaN and SiC.