Abstract

This paper focuses on total ionizing dose (TID) effects induced in multiple-gate field-effect transistors. The impact of device architecture, geometry and scaling on the TID response of multiple-gate transistors is reviewed in both bulk and silicon-on-insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technologies. These innovating devices exhibit specific ionizing dose responses which strongly depend on their three-dimensional nature. Their TID responses may look like the one usually observed in planar two-dimensional bulk or SOI transistors, but multiple-gate devices can also behave like any other CMOS device.

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