Abstract
Sub-5 nm lithography and metrology are the key technologies for more CMOS and beyond CMOS nanoelectronics. To keep up with scaling down of nanoelectronic components, novel instrumentation for nanometer precise placement, overlay alignment, and measurement are essential to enable fabrication of next generation nanoelectronic systems. In particular, scanning probe microscopy (SPM) based methods for surface modification and measurement are the emerging techniques for producing and testing of sub-5 nm features. In this article, the authors demonstrate nanoscale lithography and coordinate metrology technologies, both being based on SPM methodology. Scanning probes with a piezoresistive deflection read-out and an integrated deflection actuator, later on referred to as the active piezoresistive cantilevers, were used for lithography employing field emission patterning. They were also integrated with the so-called nanomeasuring machine (NPM) and used for surface imaging, which made it possible to measure the structure dimensions in the 25 × 25 × 5 mm3 space with 0.1 nm resolution and great accuracy. The basic NPM concept relies on a unique arrangement, enabling the so-called Abbe error-free measurements in all axes over the total scan range. The combination of the active piezoresistive cantilevers and NPM technologies makes it possible to store the exact location on the investigated surface, which can be found again with an accuracy of less than 2.5 nm. This system is also predestinated for the critical dimension, quality, and overlay control.
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More From: Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena
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