Time-Domain Multiply–Accumulate Unit

Abstract

In this article, a novel approach for performing multiply–accumulate (MAC) operations in the time-domain is presented. The Internet of Things, machine learning, and 5G are driving up demand for this type of operation, which is also crucial for many applications that rely on digital signal processing (DSP). For accomplishing this operation, a fully time-domain MAC unit capable of consecutively multiplying two input time pulses and adding them to previously stored signals is proposed. The main component of the circuit is the time register, which adds and stores time information. The MAC unit design is realized in commercial 180-nm CMOS process and occupies an estimated area of about 3167 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula> m <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The proposed circuit can perform MAC operations with less than 5% error for a dynamic range (DR) of 19 ns, presenting an <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$R$</tex-math> </inline-formula> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> linearity of over 0.99. Its power consumption is 1.72 mW from a 1.8-V supply.