Time domain modelled ADC BIST with ramp noise projection

Abstract

ABSTRACTThis paper proposes a time domain modelled built-in self-test (BIST) with ramp noise projection and their effects on analogue to digital converter (ADC) in testing. A self-biased linear ramp generator has been proposed for high precision testing. Threshold inversion quantization (TIQ) comparator based fast switching flash ADC has considered under test. A time domain model of output response analysis technique has been proposed to calibrate the linearity errors of the converter. An ADC has been validated with different input frequencies to characterize the harmonic distortion and average delay of the system. The proposed testing technique requires less time to measures the uncertainties of the ADC since the full computation is performed within one ramp cycle. The testing results of the proposed BIST technique are aimed to characterize, validate and compare to the best results of the existing ADC BIST techniques for test accuracy.