Abstract
This paper presents explicit threshold voltage modeling based comparative threshold voltage exploration of Junctionless (JL) and Junction-based (JB) High-K gate stack (HKGS) Dual-Material (DM) Cylindrical Gate-all-around (CGAA) Macaroni (Mac.) MOSFET. Based on Young’s popular Parabolic Potential Approximation (PPA), device features like inner potential has been formulated. Based on the expression of inner potential, threshold voltage has been extracted. Other major short channel effects like Drain-induced barrier lowering (DIBL) and subthreshold swing (SS) have also been analyzed. Device parameters such as inner, outer radii, channel lengths, type of high-k gate oxide, source/drain doping for JB device, etc. have also been varied to examine their effects on device parameters. Finally mathematical outputs have been corroborated with simulation outputs from Atlas.
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