Threshold-Voltage Instability of Single-Crystal Si Thin-Film Transistors Fabricated on Plastic Substrate

Abstract

Single-crystal Si thin films are transferred onto plastic host substrate after selectively removing the buried oxide (BOX) layer on the silicon-on-insulator (SOI) substrate. A layer of SU-8 epoxy is used as gate dielectric for the thin-film transistors (TFTs) fabricated on the transferred Si thin films. Here we report the first observation of threshold voltage (Vt) instability on these n-type, single-crystal Si TFTs on flexible plastic substrate. It is observed that Vt shifts to higher (lower) value under high positive (negative) gate-bias stressing. The logarithmic time-dependence of the Vt shift suggests that the instability is attributed to charge trapping in the gate dielectric layer.