Design of multiplexer in amorphous silicon technology

Abstract

The large area capability of amorphous silicon technology finds many active matrix displays and imaging arrays employing the a-Si:H thin film transistors (TFTs) as analog switches. The TFTs are limited to simple switching applications due to the low driving current and metastability issues inherent to a-Si:H technology. The most apparent metastability issue in an a-Si:H TFT is threshold voltage (Vt) shift due to prolonged gate bias. The Vt shift is more pronounced for positive gate biases than for negative gate biases. Moreover, in the presence of a pulse gate bias, the Vt shift depends on the frequency of operation. Considering the large number of gate and data lines in displays and imaging arrays, multiplexer circuits can provide benefits such as reducing the pin count of the array, reducing the number of external chips and hence, overall system cost. In amorphous silicon technology, Pass transistor logic (PTL)-based multiplexers (MUXes) are attractive since they can be designed to have manageable Vt shifts and less transistors than logic gates based MUXes. In this article, we present Vt shift measurements on in-house fabricated a-Si:H TFTs under relevant bias conditions and analyze the performance of a PTL-based MUX circuit in a-Si:H technology.