Thermal management in TSV based 3D IC Integration: A survey

Abstract

Three Dimensional IC (3D IC) integration is one of the emerging technology which suits CMOS applications by stacking various IC layers vertically. In 3D IC, IC Layers are interconnected electrically using Through Silicon Vias (TSV’s) and mechanically by Cu–Cu bonding. The major drawbacks in 3D IC structures are thermal issues between layers and noise coupling between TSV-to-substrate and TSV-to-TSV which leads significantly on the overall system performance. This paper presents an extensive survey on one of the major issue in 3D based IC integration technique called thermal issues between the layers and how the researchers have tried to overcome the problems by introducing various materials which are suitable for elimination of hotspot, by introducing spreaders among the layers. This extensive survey work shows the complete roadmap for the thermal management in future IC Integration.