Abstract

Ever-growing consumer demand for smaller and faster devices opens up to think the semiconductor industries about another direction of improvement during IC integration as long run metal wires not only reduces the form factor of the system but also decreases the system performance by creating RC delay which in turn reduces the bandwidth during communication. In order to improve the system performance the devices must be interconnected vertically known as 3D IC integration. In this emerging technique, different modules are mounted on different layers with Si substrate and these layers are placed one on other. TSV’s (Through Silicon Via or Through Substrate Via) are the basic building blocks of the 3D ICs which are playing an important role to create high performance electrical path between thin IC chips. TSV’s carries the entire electrical signal between the layers of 3D structure. Major drawback is poor electrical signaling due to the noise coupling between signal carrying TSV’s(aggressive TSV’s) and ground TSV’s(victim TSV’s).Therefore there is a strong need of isolation between Si substrate and TSV’s with proper liner materials and structures. Perylene-N is one of the most promising dielectric material for less area consumption and less power consumption. In this paper, we compared the results for Perylene-N and conventional SiO2 liner for ETSV’s. The performance of this structure is analyzed and verified under different parameters to reduce the noise coupling. In this structure dielectric-metal-dielectric are arranged around the Copper TSV. The achieved result shows that more noise coupling is reduced by using Perylene-N as dielectric material as compared with conventional SiO2. Furthermore, Perylene-N shows 33 dB improvements in noise coupling performance at THz frequencies which is verified and validated as well in this work.

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