Thermal Budget Reduction in Metal Oxide Thin-Film Transistors via Planarization Process

Abstract

This work reports a method to reduce the process thermal budget in metal oxide (MO) thin-film transistors (TFTs). Using the thermal curing of a fluorinated polyimide planarization (PLN) layer as an efficient device activation process, this method eliminates the need for additional annealing steps before the existing PLN process in the fabrication. Bottom-gated TFTs with indium tin oxide (ITO)stabilized ZnO channels were fabricated by this method and exhibited improved electrical characteristics over control devices made with a higher thermal budget. A steep subthreshold swing of 82.8 mV/decade and a high on-off ratio of 1.3 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> were achieved. This improvement can be attributed to the fluorine diffusion from the PLN layer to the MO channels during the curing step. This method is useful for the cost-effective production of active-matrix flatpanel display (AM-FPD) panels and the implementation of MO TFTs on flexible substrates.