Abstract
The ASP (Associative String Processor) is a massively parallel fault tolerant associative processor designed for the implementation of extensible parallel processing systems. This paper describes the WASP3 processor, which is an implementation of an ASP processor array, comprising a large monolithic silicon device (5.5 cm/spl times/5.5 cm) hybridized with a bonded-silicon High Density Interconnect (HDI), which has been developed to provide a reliable interconnection medium for Wafer Scale Integration (WSI) devices. The HDI supports multi-layer, passive interconnect, providing superior electrical and noise properties for the distribution of power and signal, and allowing the WSI device to achieve improved logic density by reducing monolithic tracking overheads.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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