WASP: A WSI Associative String Processor

Abstract

ASP (Associative String Processor) modules (and support software) comprise highly-versatile and fault-tolerant building-blocks for the simple construction of dynamically-reconfigurable low-MIMD/high-SIMD second-generation Massively Parallel Processor (MPP) systems. Indeed, based on state-of-the-art microelectronics and packaging technologies, ASP modules constitute a family of packaged MPP configurations for the cost-effective implementation of highly-compact application-specific high performance information processing systems. Based on scalar-vector content-matching rather than location addressing, ASP substrings comprise homogeneous fine-grain SIMD MPP structures, which, in operation, execute a form of set processing (i.e. a sequence of scalar-vector and vector-vector processes) on relevant data. Moreover, application flexibility enables simple tailoring of parallel processing power to match user requirements. WASP devices are WSI (Wafer Scale Integration) implementations of ASP substrings and, as such, constitute fundamental building blocks for the assembly of ASP modules. Exploiting either monolithic or hybrid 1 μm CMOS WSI technologies, 8,192-processor WASP devices would enable the assembly of 65,536-processor SEM-E compatible ASP modules achieving 10 Tera-OPS/ft3, 1 Giga-OPS/W and 1 Mega-OPS/$ in cost-effectiveness. The paper discusses second-generation MPP design targets and describes ASP modules for real-time signal and data processing applications. In particular, the paper focuses on the architecture, operation, and implementation of the WASP device and reports on the progress of its development.