Abstract

The use of new mathematical approaches to constructing phase accumulators of direct digital frequency synthesizers without the problem of delay of carry signal distribution from one category to another was proposed in this paper. The causes of delay of synthesized signals and deterioration of their spectral characteristics in direct digital computing frequency synthesizers were considered. It was found that one of the major causes is the delay of carry signals in the phase accumulator of the synthesizer, based on the accumulating adder. It was shown that, with the increase of the synthesizer capacity, the duration of delays of carry signals starts playing the key role and influences directly such synthesizer parameter as the maximum operating frequency. In the paper, it was determined that one of limiting factors in terms of the maximum speed and qualitative spectral structure of digital frequency synthesizers is the speed of certain arithmetical summing operations in the core of digital synthesizer. The possibility of applying operations in the Galois field for improving the synthesizer speed was considered. Mathematical operations of adding and subtracting number pairs without the carry were developed. The same approach can be used for performing operations with greater capacity. The proposed mathematical tool will allow constructing the digital computing synthesizer without the problem of delay of carry signals by some complication of the phase accumulator structure.

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