A Novel Approach to the Design of Memory-Reduced Direct Digital Frequency Synthesizer for OFDM Receiver

Abstract

Carrier frequency offset (CFO), whose estimation and recovery are essential important in OFDM receiver, can be corrected by tuning the frequency control word of the digital direct frequency synthesizer (DDFS). Traditional DDFS make use of modulus 2N arithmetic and may provide fine frequency tuning capabilities using a sine/cosine look up table. However, straightforward implementation results in enormous amounts of memory and power consumption. In this paper, a novel DDFS has been proposed. Its phase accumulator and ROM are split into three smaller parts based on the trigonometric function transform, and also are compressed and optimized. Performance analysis has been carried out and shows that 96% and 61% memory reduction can be achieved compared with Moran and Memoyo's method and Kesoulis's method, respectively. The design will be implemented in OFDM such as DVB-T receiver systems.