Abstract
The zero temperature coefficient (ZTC) is investigated experimentally in partially (PD) and fully depleted (FD) SOI MOSFET fabricated in a 0.13μm SOI CMOS technology. A simple model to study the behavior of the gate voltage at ZTC (VZTC) is proposed in the linear and the saturation region. The influence of the temperature mobility degradation on VZTC is analyzed for PD and FD devices. Experimental results show that the temperature mobility degradation is larger in FD than in PD devices, which is responsible for the VZTC decrement observed in FD instead of the increment observed in PD devices when the temperature increases. The analysis takes into account temperature dependence model parameters such as threshold voltage and mobility. The analytical predictions are in very close agreement with experimental results in spite of the simplification used for the VZTC model as a function of temperature in the linear and the saturation region.
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