Abstract

The synthesis method of logic circuits based on the RRAM (Resistive Random Access Memory) devices is of great concern in recent years. Inspired by the CMOS-like RRAM based logic gates, this work proposes a NMOS-like RRAM gate family. The advantages of the proposed NMOS-like RRAM gates include: (1) all the gate circuits are array-implementable; (2) the gate family is logic complete; (3) the NOR, AND and NOT gates only consume single cycle respectively in the computation phase; (4) the gate circuits save half number of RRAM devices compared with the CMOS-like RRAM based counterparts. Furthermore, the synthesis method of logic circuits based on the NMOS-like RRAM gates is proposed and discussed. The single-cycle NMOS-like RRAM gates are utilized in priority under the constraints of the logic block. The features of the proposed synthesis method are: (1) it generates the high-performance logic circuits because the NMOS-like RRAM based gates work in parallel; (2) the logic block based on the proposed NMOS-like gates can be realized in the RRAM array; (3) the large-scale logic functions can be implemented by cascading the logic blocks. The in-array full-adder circuit generated by the proposed synthesis method only consumes three cycles in minimum, which outperforms the previous RRAM based counterpart. The synthesis results on the benchmark circuits show that the proposed synthesis method is able to generate the high-performance circuit in RRAM arrays for arbitrary logic functions.

Highlights

  • The computation in memory (CIM) is an emerging circuit style

  • Cui et al.: Synthesis Method of Logic Circuits Based on the NMOS-Like RRAM Gates

  • Cui et al.: Synthesis Method of Logic Circuits Based on the NMOS-Like RRAM Gates TABLE 1

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Summary

INTRODUCTION

The computation in memory (CIM) is an emerging circuit style. The design method of logic circuits based on the memory devices has attracted great attention from the academia and industries, because it is a feasible way to implement the Non-von Neumann computer architecture. X. Cui et al.: Synthesis Method of Logic Circuits Based on the NMOS-Like RRAM Gates. The CMOS-like RRAM gates as shown in Fig. are not array-implementable It means that they are not able to be applied to the computation in memory. This work studies and discusses the synthesis methods of logic circuits based on the proposed NMOS-like RRAM gates. The AND gate consumes four working cycles, because the computation step of the AND gate and the input step of the NOT gate are executed in the same cycle This CMOS-like solution has disadvantages on both the performance and area consumption. X. Cui et al.: Synthesis Method of Logic Circuits Based on the NMOS-Like RRAM Gates TABLE 1.

THE MULTI-INPUT NMOS-LIKE GATES
Findings
CONCLUSION
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