Abstract
The subtractive process of forming a metallization system for integrated circuits has been studied. Structures with aluminum and copper conductors with different pitches were used as models. The gaps between the conductors were filled using the chemical solution deposition technique. The formed organosilicate layers provided complete or partial planarization of the relief. Electrical measurements indicated a decrease in capacitance and leakage currents in structures with nanoporous dielectric layers.
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