The optimal choice of high pin count ASIC packages

Abstract

Six different types of application-specific integrated circuit (ASIC) packages are compared with respect to production aspects, availability, reliability, thermal and electrical properties, and cost. Recommendations for the proper choice of packages for different types of applications are given. Pin-grid-array packages are found to be expensive and the through hole mounting reduces the routing capability of the board. Pad-area-array packages are a hermetic alternative with a lower price for the package as well as very good thermal and electrical properties, but they need to be mounted on expensive printed-wiring board (PWB). Another surface-mountable package which is hermetic is the ceramic leaded chip carrier with fine lead pitch. This package is even more expensive than the pin-grid array package and it is difficult to handle. It is suggested that in the future, nonhermetic alternatives will probably be dominant. Plastic quad flat pack and TapePak can be used when less than 160-170 leads are necessary, while direct assembled tape automated bonding (TAB) is believed to be the best alternative for very high pin counts. >