The Implementation of Evolvable Hardware Closed Loop

Abstract

To find an easy experimental way for evolvable hardware (EHW), an closed loop platform was discussed based on a field programmable gate array (FPGA) chip, a microprocessing unit (MPU) and the software tool-Quartus II. A binary digit to VHDL converter was proposed. It facilitated the using of the different FPGA chips as evolving carriers and avoided learning of the technological details inside the chips and analyzing of the different and complicated bitstream structures of chips. Tool command language (Tcl) scripting was used to create a Quartus II projectand add VHDL files into the project automatically. Command-line operation and batch processing were used to achieve analysis, synthesis, and programming FPGAs automatically step by step. The closed loop was implemented, which is the key of online evolution study for EHW. The students can conduct EHW experiments and needn't to know the bitstreamstructures of FPGA with the closed loop platform.