Abstract
Electro-Static Discharge (ESD) protection design is one of the indispensable reliability designs in chip research and development. This paper first expounds the concept of ESD protection design, and then, according to the characteristics of the industrial Field Programmable Gate Array (FPGA) chip, proposes ESD protection scheme suitable for the FPGA chip by dividing the chip area, determining the chip power supply strategy and applying on-chip ESD structure. Due to the Harsh electromagnetic industrial environment, system-level ESD protection was also considered in this FPGA chip to enhance both chip-level and system-level ESD protection.
Published Version
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