The Implementation of AES-CMAC Authenticated Encryption Algorithm on FPGA

Abstract

The advancements in communication technology have evolved the algorithms used for communication security. Recently, the Authenticated Encryption (AE) algorithms are employed for providing security services for data communication. The Advanced Encryption Standard in Counter mode (AES-CTR) with Cipher-block Chaining Message authentication code (AES-CCM) algorithm is used for providing the data security for various applications. But the AES-CCM algorithm provides limited throughput for data communication. Therefore, in this work, new architecture is proposed for increase in throughput for provision of data security for communication application. The proposed algorithm uses the AES-CTR algorithm with the Cipher-based Message Authentication Code (CMAC) algorithm for providing AE. The proposed AE algorithm is implemented on FPGA and it’s compared with the FPGA implementation of AES-CCM algorithm. The comparison results of the proposed algorithm and the AES-CCM algorithm shows that the proposed algorithm provides improvement in the consumption of the area, processing time, and throughput. The implementation of proposed AES-CMAC AE algorithm on FPGA provides a throughput of 4.30 Gbps.