Abstract

The evolution in digital communication technology has provoked the need for providing efficient security services for communication. The data security services majorly includes; confidentiality, authenticity, and integrity services. The Authenticated Encryption (AE) algorithm provides all these three services. Initially, AE algorithms were proposed with serial architecture. These AE algorithms are low throughput as compared to parallel architecture algorithms such as Galois Counter Mode (GCM) algorithm. In this work, we have presented a new AE algorithm with parallel architecture named as Parallel Cipher-based Message Authentication Code (PCMAC). The PCMAC AE algorithm is consists of Advanced Encryption Standard (AES) algorithm in Counter mode (CTR) and parallel implementation of the CMAC authentication algorithm. The proposed PCMAC algorithm is implemented on FPGA for showing its utility for high throughput applications. In this work, we compared the PCMAC AE algorithm implementation with the GCM AE algorithm implementation. The experimental results show that the throughput of PCMAC algorithm for pipelined implementation is 41.45 Gbps.

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