Abstract
In order to interpret the effect of metal work function on the formation of the barrier height at metal/semiconductor (M/S) interface, the CdS/SnO2/In–Ga structures with several metals (Ag, Au, Al, Te) have been investigated by using I–V characteristics at room temperature. The main electrical parameters such as ideality factor (n), zero-bias barrier height (ΦBo), series resistance (Rs) have been determined and compared with each other. The values of n were found to be 3.00, 2.56, 3.83, and 3.31 for Al, Ag, Te, and Au/CdS/SnO2/In–Ga structures, respectively. The values of ΦBo were also found to be 0.489 eV, 0.490 eV, 0.583 eV, 0.591 eV for Al, Ag, Te, and Au/CdS/SnO2/In–Ga structures, respectively. The ΦBo dependence on the metal work function (Φm) was found to vary almost linearly as ΦBo = 0.106Φm + 0.028. The low value of the slope S (dΦB/dΦM ≅ 0.106) shows a weak relationship between ΦBo and Φm due to serious Fermi-level pinning in the conduction band. In addition, the I–V plots have a rectifying behavior. The rectification ratio, defined by the ratio of forward to reverse current (RR = IF/IR) measured at the same absolute bias, was found as 11.96, 20.88, 35.82, and 75.61 for Al, Ag, Te, Au/CdS/SnO2/In–Ga diodes, respectively. In addition, the values of Rs were determined from Ohm's Law and Norde's method. Analysis of I–V characteristics confirm that using of different metal (Al, Ag, Te, Au) has significant effect on electrical parameters of such devices.
Published Version
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