The Design and Realization of Low Frequency Signal Receiver with High Sensitivity

Abstract

This paper introduces a kind of receiver that can receive signal which weak to UV level. First, the common mode rejection for the input differential signal is necessary, and a low noise amplifier followed by. Then we should let the signal go through a Programmable filter whose center frequency, Q are all selected via pin-strapped inputs. In order to get the appropriate amplitude of the signal, an automatic gain control amplifier is needed. Last, before the signal sampled by the A/D converters, an active filter and an operational amplifier is followed by the AGC amplifier. Through the actual test, the low frequency signal receiver with high sensitivity introduced in this paper has the characteristics of high sensitivity and stability, so it can be applied in some engineering. Introduction Nowadays, most signals received by the antenna and sensor devices are very weak, so the extraction of weak signal from the noise outside seems more important. With the rapid development of the integrated chip, the application of some high performance chips makes the design of circuit more convenient. In this paper, a high precision instrumentation amplifier INA129 is used as the pre amplifier with low noise. And the signal will go through MAX267BCWG, the Pin Programmable Universal and Band pass filter, letting the received signal amplitude amplification to the specified range. The application of low power variable gain amplifier AD8338 makes the root mean square value of the output-signal fixed. The Principle and Design Hardware. The system diagram is shown in Figure 1 and the digital program signal from FPGA. The pre amplifier with low noise Programmable variable gain filter AGC Power Digital signal Input signal A/D Fig.1 receiver system block diagram The Low Noise Preamplifier. The chip INA129 is low power, general purpose instrumentation amplifiers offering excellent accuracy. A single external resistor can set any gain from 1 to 10,000. INA129 is laser trimmed for very low offset voltage, temperature drift and high common-mode rejection. It can work normally with power supplies as low as ±2.25V, and the quiescent current is only 700μA, so it is ideal for battery operated systems. In addition, with the protection of internal input protection circuit, it can withstand up to ±40V and not be damaged. RC f0 π 2 / 1 = In practical application, we should fully suppress the power line interference and the common-mode interference existed at the receiving terminal. The easiest way is letting the signal go International Conference on Information Sciences, Machinery, Materials and Energy (ICISMME 2015) © 2015. The authors Published by Atlantis Press 1273 through a Common mode inductor and a high pass filter. The high pass filter uses a passive RC network to realize, the cut-off frequency . Because of the received signal is extremely weak, so the pre amplifier with low noise INA 129 should power alone. In order to minimize the noise impact on the post stage circuit, the gain should not be too large. The specific circuit is shown in figure 2: The gain of INA129 G R K G Ω + = 50 1 . INA129 Noise suppression circuit The differential signal High pass filter Fig.2 Schematic diagram of low noise preamplifier Programmable Filter. MAX267BCWG is a programmable precision band pass filter which has 32 level mode for the center frequency change and 128 kinds of Q value choice. Each MAX267BCWG contains two independent second-order filters which can be directly applied in series. The gain of each order filter is only related Q value. In addition, each chip has an uncommitted op-amp. We can change the ratio of input resistor and feedback resistor to control the gain. So the control of the gain is very convenient. In this design, we cascade two second-order filters, the signal goes through the uncommitted amplifier first and then a four order filter followed by. A total of three pieces chips are used to form a twelve-order filter and the gain of each chip is 10 times. The specific circuit is shown in figure 3. As can be seen from the chart, some of the pins which control the Q value and the center frequency connect to power supply directly to force its voltage fixed. Other control pins and the clock signal is controlled by FPGA. In order to avoid the interference between digital signal and analog signal, an optical coupler will be used to isolation control. At the same time, we also need to make the isolation of analog ground and digital ground to suppress the interference from each other. The gain of each piece MAX267BCWG: 2