Abstract
We present a heterogeneous architecture that contains a fine grained, massively parallel SIMD component called the data structure accelerator and demonstrate its use in a number of problems in computational geometry including polygon filling and convex hull. The data structure accelerator is extremely dense and highly scalable. Systems of 106 processing elements can be embedded in workstations and personal computers, without dramatically changing their cost. These components are intended for use in tandem with conventional single sequence machines and with small scale, shared memory multiprocessors. A language for programming these heterogeneous systems is presented that smoothly incorporates the SIMD instructions of the data structure accelerator with conventional single sequence code. We then demonstrate how to construct a number of higher level primitives such as maximum and minimum, and apply these tools to problems in logic and computational geometry. For computational geometry problems, we demonstrate that simple algorithms that take advantage of the parallelism available on a data structure accelerator perform as well or better than the far more complex algorithms which are needed for comparable efficiency on single sequence computers.
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More From: International Journal of High Speed Electronics and Systems
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