Abstract

An inflection point on the behaviour of MOSFET over wide range of temperatures (T) influences performance of both analog and digital circuits. This work is an investigation to find the point of inflection at which the temperature coefficient is zero of Ultra-Thin Si directly on Insulator (UT-SDOI) single gate (SG), double gate (DG), and gate stack double gate (GS-DG), n-MOSFET over wide range of temperatures (100–400K) through 2-D device simulation. The interface trapped charges which are common during the pre and post fabrication process are also considered in the simulation. The impact of T on various performance metrics like on current (Ion), off current (Ioff), on–off current ratio (Ion/Ioff), subthreshold slope (SS), Q-factor, intrinsic gate delay (τ), energy delay product (E⋅τ), transconductance (gm), output conductance (gd), intrinsic gain (AV), cut off frequency (fT) and sweet spot have been analyzed extensively to benchmark the device behaviour. The impact of temperature compensation point (TCP) over various performances for three typical devices is compared. This validates an opportunity for nanoscale MOSFETs in designing the circuits used for various applications.

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