Technology Scaling Trend of Soft Error Rate in Flip-Flops in <inline-formula> <tex-math notation="LaTeX">$1\times$ </tex-math> </inline-formula> nm Bulk FinFET Technology

Abstract

This paper presents the soft error rate (SER) in flip-flops of 10-nm FinFET technology, and discusses the scaling trend of SER from 14- to 10-nm FinFET technologies. Alpha and neutron irradiation test results show huge SER improvement in 10-nm FinFET technology. In a 10-nm FinFET, the alpha-induced SER decreases by $13.4\times $ , and the neutron-induced SER decreases by $3.1\times $ , compared to the 14-nm FinFET technology. The SER improvement is analyzed with the physics-based 3-D technology computer-aided design and Monte Carlo simulations. The simulation results show that fin-width scaling reduces the charge generation as well as charge collection which explains the SER improvement observed in 10-nm FinFET technology.