Abstract
A high-performance tape-automated-bonding (TAB) package has been developed for a TAB on board (TOB) application as a replacement for high lead count, high power, ceramic pin grid array (CPGA) packages. Leadcount is in excess of 250 pins and each package can dissipate more than 10 W at relatively low air flow rates. This technology has been implemented on a multichip VLSI-based processor board. The processor board contains six TAB devices on a 10 layer 8*14 in surface-mount-technology (SMT) PC board, as well as other SMT and through hole components. The package uses a unique bumpless inner lead bonding process on a 110- mu m (4.3 mil) pitch and a 406 mu m (16 mil) pitch solder reflow outer lead bonding process. Reliability has been demonstrated through extensive testing at both the package and system level. The authors provide an overview of the package construction, assembly processes, and reliability testing.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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