Switching and Heat-dissipation Performance Analysis of an LTCC-based Leadless Surface Mount Package

Abstract

A leadless surface mount package was developed to enhance the switching and heat-dissipation properties of a power semiconductor. The package was implemented through a low-temperature co-fired ceramic (LTCC)-based multilayer circuit substrate that could form embedded cavities. A silicon carbide (SiC) Schottky barrier diode (SBD) bare die was attached to the cavity in the LTCC substrate. Chip interconnection was realized using a wide and thick copper (Cu) clip with a low parasitic inductance and electrical resistance compared to those of a conventional wire. Silver-filled multiple vias and wide metal planes were used to reduce the electrical parasitic effects and enhance the heat-dissipation of the package. The DC and dynamic characteristics of the 600 V/10 A-class SiC SBD package involving the proposed technologies were evaluated. The dynamic test results indicated that the reverse recovery charge (Qrr) was 18.7% lower than that of a traditional TO-220 packaged product with the same bare die. Furthermore, two leadless commercial products and he proposed package prototype were applied to a power factor correction (PFC) converter, and the power loss and heat-dissipation performances were compared. The proposed package exhibited a lower loss and higher heat dissipation than those of the commercial products.