Switching and heat-dissipation performance analysis of an LTCC-based leadless surface mount package using a power factor correction converter

Abstract

We propose a low-temperature co-fired ceramic (LTCC)-based leadless surface mount package to improve switching and heat-dissipation properties of a power semiconductor. A silicon carbide (SiC) Schottky barrier diode (SBD) bare die is embedded to a cavity in the LTCC-based multi-layer substrate. Instead of conventional aluminum wires, a flat copper clip is used to reduce parasitic inductance and electrical resistance caused by bond wires. Multiple vias filled with silver are embedded in the multi-layer substrate to decrease the electrical resistance and to improve heat-dissipation of the package. The measured reverse recovery charge (Q <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rr</inf> ) was 18.02 nC at a reverse voltage of 300 V and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$di/dt$</tex> of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$300\ \mathrm{A}/\mu\mathrm{s}$</tex> . It exhibits 18.7% improvement in the Q <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rr</inf> as compared to the conventional TO-220 packaged product using the same bare die. The power loss and heat-dissipation performances of the proposed package was evaluated through a power factor correction (PFC) converter. In comparison with commercial products, we can see that the proposed package has low-loss and high heat-dissipation properties.