Abstract

Abstract Since the advent of surface mount technology back in the 1970's we, as an industry, have continually worked to miniaturize our products. This evolution of product design has impacted us at the semiconductor, package, circuit board and system levels. So, the question is, Why do Electronics Fail Under Thermal Cycling? At the semiconductor level, you can have issues with delamination, IC complexity, degradation mechanisms, associated ceramic capacitor wearout, and electrical overstress (EOS). At the package level issues with bond wires and stacked die add to the reliability impact. At the printed circuit board level issues with solder wearout, solder phase coarsening, PWB laminates and glass materials, plated through hole (PTH) fatigue, and the impact of potting can also affect reliability while at the system level, heat sinks and other methods of heat removal can improve the situation. What drives these issues is that we use a variety of materials e.g. semiconductors, ceramics, metals and polymers. We then bond them together with other materials like solder and adhesives. Each of these materials has a Coefficient of Thermal Expansion (CTE) that is unique and therefore expands and contracts at different rates.

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