Abstract
Department of Photovolatic Engineering, Far East University, Eumseong 369-851, Korea(Received July 17, 2014; Accepted July 24, 2014)Abstract: This paper was developed and described core-process to implement low on resistance which was the most important characteristics of SJ (super junction) MOSFET. Firstly, using process-simulation, SJ MOSFET optimal structure was set and developed its process flow chart by repeated simulation. Following process flow, gate level process was performed. And source and drain level process was similar to genral planar MOSFET, so the process was the same as the general planar MOSFET. And then to develop deep trench process which was main process of the whole process, after finishing photo mask process, we developed deep trench process. We expected that developed process was necessary to develop SJ MOSFET for automobile semiconductor.Keywords: Super juction, n-pillar, p-pillar, On-resistance, Breakdown voltage, Trench angle, Power devices, Power MOSFET, Epi-layer, Process design, Process parameter, Design parameter
Published Version (
Free)
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call