Subthreshold Characteristic Analysis and Models for Tri-Gate SOI MOSFETs Using Substrate Bias Induced Effects

Abstract

This paper proposes the substrate bias voltage dependent subthreshold models of channel potential, threshold voltage, current, drain induced barrier lowering, and subthreshold swing for tri-gate silicon-on-insulator (SOI) MOSFET s (TG- MOSFET s). The substrate induced surface potential effect has also been included in the derived models. A quasi-three-dimensional (3-D) approach has been used to derive the minimum of channel potential, which is later used to derive models of threshold voltage, current, drain induced barrier lowering, and swing. The analytical results of TG-SOI MOSFET have been compared with the simulation results obtained from the Visual TCAD, a 3-D device simulator from Cogenda Pvt. Ltd.