Studying the Effect of Stackup Structure of Large Die Size Fan-In Wafer Level Package at 0.35 mm Pitch With Varying Ball Alloy to Enhance Board Level Reliability Performance

Abstract

In this study a four-layer fan-in wafer level package (WLP) structure (two passivation layers, one redistribution metal layer (RDL) and one under bump metallurgy layer (UBM) with die size 8 x 8 mm2 and ball pitch 0.35 mm is used for board level reliability (BLR) evaluation. The solder joint stress during BLR tests are highly related to the structure and solder ball alloy used in WLP bumping process based on simulation input. In this work, we evaluated different WLP structures with different stackup thickness including passivation layers, RDL layer, UBM layer and different solder ball alloy to reduce solder joint stress and thus enhance BLR performance. Besides, the impact of different die thickness post wafer grinding process was also included. All the different WLP structures have been evaluated by employing board level reliability test following JEDEC include thermal cycling test, drop test and cyclic 4-point bend test. From this work, an improved fan-in WLP stackup structure was demonstrated to pass board level TCT 500 cycles (include both corner chain balls/non-corner chain balls), drop test 150 times and cyclic bend test 200,000 cycles without any failure for 8x 8 mm2 die size at 0.35 mm pitch with doped SAC405 alloy.