The Comparative Study to Enhance Board Level Reliability Performance of Wafer Level Package At 0.25 mm Pitch Using Micro-Ball Drop and Electroplated Solder Technology

Abstract

In this study, the board level reliability of WLP at 0.25mm pitch has been evaluated by employing board level reliability test following JEDEC include thermal cycling, drop shock and cyclic 4-point bend tests to verify the performance of shrunk bump size. The WLP test vehicle has been designed with 4-layer stack up structure, 4.0 × 4.0 mm die size and 15 × 15 ball array. The shrunk bumps of test vehicles were formed by using micro-ball drop and electroplated lead free solder bumping process after UBM plating completed. The shrunk bump size in WLP at 0.25mm ball pitch will enhance the risk of board level solder joint fatigue due to lower standoff height and smaller diameter of solder joint (higher bump stress concentration). In this work, we also evaluated different 4-layer WLP stack up structures for key design parameters including polyimide, RDL and UBM layers to reduce solder joint stress and thus enhance BLR performance All the study legs passed drop test with the 1st fail >100 drops and passed 200K times cyclic bend test without any failure. The TCT performance of micro-ball drop bumped legs showed better results with 1st fail passed 500X cycles. The drop, bend test and TCT performance are improved by new bump stack-up designs.