Abstract
In Complementary Metal Oxide Semiconductor (CMOS) process, isolation is the key and it has got more influence on the device performance. The most advanced process is using Shallow trench isolation (STI) technology, but for small geometry processes using STI technology will be very difficult because of severe HCI (Hot Carrier Injection) problem and need to have new advanced equipment for using STI technology. So many factories still using Local Oxidation of Silicon (LOCOS) isolation for small geometry applications like nano-devices. LOCOS isolation has a problem because of its bird's beak will occupy big area and causes leakage path. Using Poly-Buffer in the LOCOS isolation will reduce the bird's beak around 40% and hence CMOS integration process improves product yield and performance will be drastically improved. Feature of the model using Poly-Buffered LOCOS (PBLOCOS) is very similar and very easy than using basic LOCOS process. Sometime PBLOCOS Isolation will be more useable than STI technology.
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