Abstract

It is well known that the vertical tunnel field effect transistor (TFET) is easier to fabricate than the conventional lateral TFETs in technology. Meanwhile, a lightly doped pocket under the source region can improve the subthreshold performance of the vertical TFETs. This paper demonstrates a dual material gate heterogeneous dielectric vertical TFET (DMG-HD-VTFET) with a lightly doped source-pocket. The proposed structure adopts a GaSb/GaAs0.5Sb0.5 heterojunction at the source and pocket to improve the band-to-band tunneling (BTBT) rate; at the same time, the gate electrode is divided into two parts, namely a tunnel gate (M1) and control gate (M2) with work functions ΦM1 and ΦM2, where ΦM1 > ΦM2. In addition, further performance enhancement in the proposed device is realized by a heterogeneous dielectric corresponding to a dual material gate. Simulation results indicate that DMG-HD-VTFET and HD-VTFET possess superior metrics in terms of DC (Direct Current) and RF (Radio Frequency) performance as compared with conventional VTFET. As a result, the ON-state current of 2.92 × 10−4 A/μm, transconductance of 6.46 × 10−4 S/μm, and average subthreshold swing (SSave) of 18.1 mV/Dec at low drain voltage can be obtained. At the same time, DMG-HD-VTFET could achieve a maximum fT of 459 GHz at 0.72 V gate-to-source voltage (Vgs) and a maximum gain bandwidth (GBW) of 35 GHz at Vgs = 0.6 V, respectively. So, the proposed structure will have a great potential to boost the device performance of traditional vertical TFETs.

Highlights

  • According to the Moore’s law, both high switching speed and low-power consumption are necessary for nanoscale devices

  • This section analyzes the effects of arsenic composition in GaAsy Sb1−y on the transfer characteristics in DMG-HD-vertical tunnel field effect transistor (VTFET), the physical mechanism of DMG-HD-VTFET, the input characteristics, the output characteristics, the effects of device parameters on the transfer characteristics, and the RF performance

  • For the reference of simulation comparison, the same device size is adopted in VTFET, HD-VTFET, and DMG-HD-VTFET

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Summary

Introduction

According to the Moore’s law, both high switching speed and low-power consumption are necessary for nanoscale devices. As the conventional metal oxide semiconductor field effect transistors (MOSFETs) scale down to nano regimes, various performance setbacks will occur due to device miniaturization. The scaling of MOSFETs to the nanometer regime faces big challenges of short channel effects (SCEs) and high leakage currents; the limitation of 60 mV/Dec subthreshold swing (SS) of MOSFETs can not be broken on account of their working mechanism, at the same time, a drain-induced barrier lowering (DIBL) effect is arising. For about 15 years, many of the studies reported have focused on the tunnel field effect transistor (TFET) [1,2,3,4], which is a promising candidate for future ultra-low power applications. Unlike MOSFETs, TFETs generate current by a gate-controlled band-to-band tunneling (BTBT) mechanism, where carriers inject from source to channel with controlling the band bending in the source/channel interface [5,6]

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