Abstract
In this paper, a dual metallic material gate heterostructure junctionless tunnel field-effect transistor (DMMG-HJLTFET) is proposed and investigated. We use the Si/SiGe heterostructure at the source/channel interface to improve the band to band tunneling (BTBT) rate, and introduce a sandwich stack (GaAs/Si/GaAs) at the drain region to suppress the OFF-state current and ambiplolar current. Simultaneously, to further decrease ambipolar current, the gate electrode is divided into three parts namely auxiliary gate (M1), control gate (M2), and tunnel gate (M3) with workfunctions ΦM1, ΦM2 and ΦM3, respectively, where ΦM1 = ΦM3 < ΦM2. Simulation results indicate that DMMG-HJLTFET provides superior performance in terms of logic and analog/RF as compared with other possible combinations, the ON-state current of the DMMG-HJLTFET increases up to 9.04 × 1 0 − 6 A/μm, and the maximum gm (which determine the analog performance of devices) of DMMG-HJLTFET is 1.11 × 1 0 − 5 S/μm at 1.0V drain-to-source voltage (Vds). Meanwhile, RF performance of devices depends on the cut-off frequency (fT) and gain bandwidth (GBW), and DMMG-HJLTFET could achieve a maximum fT of 5.84 GHz, and a maximum GBW of 0.39 GHz, respectively.
Highlights
The mechanism of conventional metal oxide semiconductor field effect transistors (MOSFETs) is thermal electron emission, so the continuous scaling of conventional MOS device is extremely difficult in nanoscale circuit because of a great many reasons, such as, VDD scaling of MOSFETs is no longer viable, OFF-state current dramatically increases and short channel effects (SCE) is severely aggravated, and a limitation of 60 mV/Dec subthreshold swing (SS) can’t be broken [1,2]
In order to overcome these issues, different types of structure have been investigated in recent years, among them, tunnel field effect transistor (TFET) [3,4] is a selective candidate for future low power applications due to its complementary MOS (CMOS) process compatibility and scalability, which employs band-to-band tunneling (BTBT) mechanism and is not influenced by the short channel effect, it can break the SS limit of 60 mV/Dec, and the leakage current is small under the OFF-state condition [5,6,7]
Most of TFETs reported in recent years adopt different doping concentration in channel and active regions to form heavily doped abrupt junction at tunneling interface, which leads to a complex fabrication processes and a high thermal budget, what’s more, Appl
Summary
The mechanism of conventional metal oxide semiconductor field effect transistors (MOSFETs) is thermal electron emission, so the continuous scaling of conventional MOS device is extremely difficult in nanoscale circuit because of a great many reasons, such as, VDD scaling of MOSFETs is no longer viable, OFF-state current dramatically increases and short channel effects (SCE) is severely aggravated, and a limitation of 60 mV/Dec subthreshold swing (SS) can’t be broken [1,2]. Most of TFETs reported in recent years adopt different doping concentration in channel and active regions to form heavily doped abrupt junction at tunneling interface, which leads to a complex fabrication processes and a high thermal budget, what’s more, Appl. Junctionless tunnel field-effect transistor (JLTFET) is immune to random dopant fluctuations (RDFs) [31], while complex fabrication processes and high thermal budgets in JLTFET manufacturing can be effectively avoided by the charge plasma concept. A dual material gate heterostructure junctionless TFET (DMMG-HJLTFET) is proposed and investigated, in which we adopt a uniform doping concentration and a corresponding P+ -N+ -I-N+ structure can be realized via the charge plasma concept with appropriate work function for polar gate (PG) and control gate (CG).
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