Abstract
Aluminium and aluminium-based alloys are typically used as the metallization interconnections in LSI and VLSI silicon-based integrated circuits. Important factors affecting the lifetime and reliability of these interconnections in IC devices are the individual microstructures, device layer combinations, electron migration, and stress migration that occur during their fabrication and their in-service application. There are many possible remedies for each of these factors. The use of bias sputtering or “planarization” has been shown to improve the quality of the interconnection greatly. Recently, some studies have revealed a new planarization technique involving sputter deposition of Al alloys at elevated temperature without any substrate bias, combined with a TiN precoating to reduce the migration of Al atoms. In this paper, the microstructure of Al-0.2Cu/TiN/SiO2/Si under optimum lifetime conditions is assessed, and a mechanism of void formation is proposed to explain the observations.A representative TEM cross section image of Al-0.2% Cu sputtered at 100 V bias and at substrate temperature 450°C with a TiN/SiO2 prercoating is shown in Fig.l. The surface topography of the Al-Cu alloy is shown for comparison purposes in Fig.2.
Published Version
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