Abstract

The uniaxial compressive strain has been an indispensable performance booster for p-channel FinFETs. In this work, based on extensive 3D process and device simulations, performance assessment of nanoscale tri-gate FinFETs with uniaxially strained SiGe channel (fin) has been presented. A comprehensive study based on stress tuning parameters is carried out to investigate the possible highest amount of process induced stress transfer to SiGe fin for optimization of device performance. The impact of process induced stress on carrier mobility enhancement in 7nm technology node is another major focus of this study. The stress transfer efficiency is shown for different process conditions with various Ge contents. Technology CAD simulations show that strain in the fin is large for higher Ge contents in the SiGe layer for p-channel FinFETs. For the first time, the conversion of biaxially strained SiGe to uniaxially strained SiGe via process simulation has been demonstrated, and implemented as uniaxial strained-SiGe channel (fin) in tri-gate FinFETs for high performance.

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