Steep subthreshold slope in nano-wire TFET using a potential well

Abstract

In this paper, we investigate the effect of a potential well between the source and channel on the subthreshold swing and On-current of a nano-wire TFET. Here, we benefit from the difference between the electron affinities and the band gaps of the Si and the Ge to create a potential well. While the source and the channel are composed of Ge, we place a thin Si layer between them which results in a potential well. By employing this structure, we were able to decrease the subthreshold swing to 15.7 mV/dec and achieve a high Ion at the same time. Additionally, the peak value of the electric field in the device has been decreased by 20 percent, which means we can reduce device size with fewer undesirable effects. In the context of RF analysis, the proposed device exhibits improvements in current gain and unilateral power gain compared to conventional structures. We also examine the impact of interface traps at Ge/Si interface and gate alignment with the potential well.