Design of Gate-All-Around TFET with Gate-On-Source for Enhanced Analog Performance

Abstract

In this chapter, a gate-all-around (GAA)-based extended-gate nanowire tunnel field-effect transistor (NWTFET) is designed, which is termed as NWTFET gate-on-source (NWTFET-GOS). Further, NWTFET with gate-on-drain (NWTFET-GOD), nanowire TFET (NWTFET), and nanowire TFET with gate-on-source-and-drain (NWTFET-GOSD) are also considered for the comparative study of electrical and analog performances. In this regard, various extended gate lengths in the vicinity of the drain and the source regions are used to analyze the effect. The TFET device offers less power consumption, high speed with steep subthreshold slope (SS), and enhanced immunity to short channel effect (SCE). The simulation is performed to design the TFET with the consideration of P+IN+ structures in all the devices as mentioned earlier. The III–V group material, silicon germanium (Si 1−x Ge x ), is taken in the source regions to boost the TFET characteristics. The analog performance indicators considered in this article are unity gain cutoff frequency (fT ), intrinsic device delay (IDD), transconductance frequency product (TFP), and gain-bandwidth product (GBWP). As we extend the GOS length, ION current, threshold voltage, and current ratio are enhanced in the device; however, the leakage and SS degrade marginally. All the parameters of analog behavior have been improved with the increase of the extended GOS length. The potential, electric field, recombination rate, carrier concentration, and band diagram are analyzed to understand the device physics. The influence of mole fractions of SiGe is studied for various analog parameters of the NWTFET-GOS. As the magnitude of the mole fraction value is raised, ION increases and a lower Vth value is observed. For smaller mole fractions, higher ION /IOF F ratio, steep SS, and lower leakage are achieved. The maximum value of cutoff frequency, TFP, and GBWP are also individually enhanced with the increase in x in Si 1−x Ge x . The IDD is reduced for a higher mole fraction. Among all the considered devices, ON current and ION /IOFF are the highest, and Vth is the lowest in the NWTFET-GOS. The lower threshold voltage makes this device appropriate for low power consumption. The achieved current ratio in the proposed NWTFET-GOS is 5.68 × 1010 and the leakage is around 6.96 A. The proposed NWTFET-GOS also holds the SS (<60 mV/dec) of 19.08 mV/dec, which helps in the faster transition from the OFF state to the ON state or vice versa. The NWTFET-GOS, when compared with the other devices, shows an augmentation in fT , IDD, TFP, GBWP, and transconductance (gm ) and its derivatives. A higher value of gm results in higher gain or better amplification. The analog performance indicators fT (peak) and IDD (at Vgs = 1.5 V) for NWTFET, NWTFET-GOS, NWTFET-GOD, and NWTFET-GOSD are in the ratio 1.53:4.19:1.53:1 and 1.86:1:2.51:3.30, respectively; whereas the highest values of TFP and GBWP for NWTFET-GOS are approximately 3.08 and 4.03 times larger than those of the values of the NWTFET. Thus, the NWTFET-GOS is accredited as a superior structure for analog applications.