Design and Analog Performance Analysis of Charge-Plasma Based Cylindrical GAA Silicon Nanowire Tunnel Field Effect Transistor

Abstract

Due to the rigorous practice of scaling down the device technology, certain factors such as proper electrostatic controlling of the channel, dopingless substrate, and low thermal budget at the nanoscale are the keys to designing better, efficient and cost-effective semiconductor devices. In this paper, a Charge-Plasma (CP) based Gate-All-Around (GAA) Silicon Nanowire Tunnel Field Effect Transistor (NWTFET) is proposed. Charge-Plasma technique is used to induce electron and hole concentration within the drain/source regions respectively by depositing layers of metals with specific work functions. The RF and analog performance of Dopingless Gate-All-Around Silicon Nanowire Tunnel Field Effect Transistor (DL-GAA-NWTFET) are investigated and compared with Junctionless Gate-All-Around Silicon Nanowire Tunnel Field Effect Transistor (JL-GAA-NWTFET) and Conventional Gate-All-Around Silicon Nanowire Tunnel Field Effect Transistor (C-GAA-NWTFET). The RF/Analog performance parameters such as Unity Gain Frequency (fT), Total Gate Capacitance (Cgg), Intrinsic Gain (Av), Early Voltage (VEA), Output Transconductance (gds), Transconductance to Gain Factor (TGF) and Transconductance (gm) are analyzed, which shows the enhanced output characteristics of the DL-GAA-NWTFET compared to JL-GAA-NWTFET and C-GAA-NWTFET. DL-GAA-NWTFET also provides two-order high ON-state current to the OFF-state current ratio (ION/IOFF) with an enhancement of the other sensing parameters.