Abstract
This paper presents the design and measured results of a novel static frequency divider that operates at a frequency 28% higher than a current-mode logic (CML) divider. The frequency divider was designed and implemented in IBM's 0.5 μm SiGe BiCMOS technology with an f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> of 47 GHz. The divider adds an additional delayed clock phase to a conventional CML- based divider. Measured results show operation up to 26 GHz with power dissipation of 59 mW compared to a CML divider that operates up to 20.4 GHz with power dissipation of 54.6 mW.
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